A content addressable memory (CAM) device is a storage device having an array of memory cells that can be instructed to compare the specific pattern of a comparand word with data words stored in corresponding rows of the array. During a compare operation, the comparand word is provided to the CAM array and compared with all the CAM words. For each CAM word that matches the comparand word, a corresponding match line is asserted to indicate the match result. If any of the match lines are asserted, a match flag is typically asserted to indicate the match condition, and the address or index of the highest priority matching entry in the CAM array is determined.
Row redundancy has been used to improve the yield of CAM devices. For example, in one prior redundancy scheme for a CAM device that allows a spare row of CAM cells to functionally replace a defective row of CAM cells, each row in the CAM array includes an additional latch dedicated for storing a control bit that, when asserted, disables the row by forcing the row's match line to a mismatch state. Another prior row redundancy scheme for a CAM utilizes valid bits to disable corresponding defective rows. However, these prior redundancy schemes increase the size of the array. Further, if the disabling mechanism (e.g., the dedicated latch or valid bit) for a defective row is also defective, the disabling mechanism may not be able to disable the defective row, which in turn may render the CAM device unusable.